Class | Document | Source | Message | time | Date | No. |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-1 in Normal of part U1A | 20:19:11 | 2014/1/27 ����*** | 1 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-4 in Normal of part U1A | 20:19:11 | 2014/1/27 ����*** | 2 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-10 (Inferred) in Normal of part U1A | 20:19:11 | 2014/1/27 ����*** | 3 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-13 (Inferred) in Normal of part U1A | 20:19:11 | 2014/1/27 ����*** | 4 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-14 (Inferred) in Normal of part U1A | 20:19:11 | 2014/1/27 ����*** | 5 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-15 in Normal of part U1A | 20:19:11 | 2014/1/27 ����*** | 6 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-1 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 7 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-4 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 8 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-8 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 9 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-10 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 10 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-13 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 11 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-14 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 12 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-15 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 13 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-16 (Inferred) in Alternate 1 of part U1A | 20:19:11 | 2014/1/27 ����*** | 14 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-1 (Inferred) in Normal of part U1B | 20:19:11 | 2014/1/27 ����*** | 15 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-4 (Inferred) in Normal of part U1B | 20:19:11 | 2014/1/27 ����*** | 16 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-10 in Normal of part U1B | 20:19:11 | 2014/1/27 ����*** | 17 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-13 in Normal of part U1B | 20:19:11 | 2014/1/27 ����*** | 18 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-14 in Normal of part U1B | 20:19:11 | 2014/1/27 ����*** | 19 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-15 (Inferred) in Normal of part U1B | 20:19:11 | 2014/1/27 ����*** | 20 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-1 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 21 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-4 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 22 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-8 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 23 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-10 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 24 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-13 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 25 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-14 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 26 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-15 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 27 |
[Warning] | Sheet1.SchDoc | Compiler | Extra Pin U1-16 (Inferred) in Alternate 1 of part U1B | 20:19:11 | 2014/1/27 ����*** | 28 |
[Warning] | Sheet1.SchDoc | Compiler | Floating Power Object GND | 20:19:11 | 2014/1/27 ����*** | 29 |
[Warning] | Sheet1.SchDoc | Compiler | Adding items to hidden net GND | 20:19:11 | 2014/1/27 ����*** | 30 |
[Warning] | Sheet1.SchDoc | Compiler | Adding items to hidden net VCC | 20:19:11 | 2014/1/27 ����*** | 31 |
[Warning] | Sheet1.SchDoc | Compiler | Adding hidden net | 20:19:11 | 2014/1/27 ����*** | 32 |
[Warning] | Sheet1.SchDoc | Compiler | Component U2 SN74LS04N has unused sub-part (3) | 20:19:11 | 2014/1/27 ����*** | 33 |
[Warning] | Sheet1.SchDoc | Compiler | Component U2 SN74LS04N has unused sub-part (4) | 20:19:11 | 2014/1/27 ����*** | 34 |
[Warning] | Sheet1.SchDoc | Compiler | Component U2 SN74LS04N has unused sub-part (5) | 20:19:11 | 2014/1/27 ����*** | 35 |
[Warning] | Sheet1.SchDoc | Compiler | Component U2 SN74LS04N has unused sub-part (6) | 20:19:11 | 2014/1/27 ����*** | 36 |
[Warning] | Sheet1.SchDoc | Compiler | Net CLK has no driving source (Pin U1-1,Pin V1-1) | 20:19:11 | 2014/1/27 ����*** | 37 |
[Error] | Sheet1.SchDoc | AdvSim | AU1A - Could not map Pin (1) | 20:19:11 | 2014/1/27 ����*** | 38 |
[Error] | Sheet1.SchDoc | AdvSim | AU1A - Could not map Pin (2) | 20:19:11 | 2014/1/27 ����*** | 39 |
[Error] | Sheet1.SchDoc | AdvSim | AU1A - Could not map Pin (1) | 20:19:11 | 2014/1/27 ����*** | 40 |
[Error] | Sheet1.SchDoc | AdvSim | AU1B - Could not map Pin (1) | 20:19:11 | 2014/1/27 ����*** | 41 |
[Error] | Sheet1.SchDoc | AdvSim | AU1B - Could not map Pin (2) | 20:19:11 | 2014/1/27 ����*** | 42 |
[Error] | Sheet1.SchDoc | AdvSim | AU1B - Could not map Pin (1) | 20:19:11 | 2014/1/27 ����*** | 43 |
[Warning] | Sheet1.SchDoc | AdvSim | U2A - No SIM implementation for part | 20:19:11 | 2014/1/27 ����*** | 44 |
[Warning] | Sheet1.SchDoc | AdvSim | U2B - No SIM implementation for part | 20:19:11 | 2014/1/27 ����*** | 45 |